Design of Rayleigh Fading Channel Simulator

A design scheme of FPGA-based Rayleigh fading channel simulator is proposed in this paper, which adopts an improved Jakes simulation model based on the sum-of-sinusoid method. The statistical characters of the proposed model have better goodness of fit with those of Rayleigh fading channels. It is shown from both the fixed-point simulation of the model and the experimental results of the simulator that the proposed simulator can attain better performances in simulating Rayleigh fading channels.