Abstract: By the research on the characteristics of νMOS and the principles of multi-valued logic circuits, a novel design scheme of inverter with controllable threshold is presented. Similar to the structure of ordinary CMOS, the novel inverter is composed of a νMOS and an ordinary MOS transistor. In this proposed scheme, the controllability of the threshold of inverter is implemented by using the controllable threshold characteristic of νMOS transistor. PSPICE simulation has verified the designed circuit. By testing some function circuits, it is shown that the power savings of the designed circuit attains 46% of that of conventional inverter.