Abstract: Content addressable memory (CAM) is a kind of memory with data search function that provides reading and writing ability by static random-access memory (SRAM), and is usually used in high-speed data search circuits. However, although many works have been recently reported on the ternary SRAM, few results have been obtained about ternary CAM. In nano-scale on CMOS, there are still many problems and challenges, such as short channel effect, increased drain power, and lower gate control ability. Carbon nano tube (CNT) is expecting to become the next important material in integrated circuit design, due to its excellent performance, especially, its ultra high electron mobility and super small size. These features make CNT as an ideal material of the preparation of high-performance field effect tube. Carbon nano tube field-effect transistor (CNFET) is a kind of material with adjustable threshold voltage, so it is suitable for designing multi-valued logic circuits. By researching CNFET, the structure of ternary SRAM cell, and data compare circuit, this paper proposes a design scheme on ternary content addressable memory cell with CNFET. First, the ternary buffer is designed by using switch-signal theory and CNFET. And then, the input and output are connected by transmission gate to achieve the function of SRAM cell. In addition, by combining the SRAM cell with ternary logic circuit, a ternary CAM cell is achieved. Finally, the experiment under Stanford University 32 nm CNFET standard model is made, which shows that the proposed CAM cell has the correct logic function. Moreover, compared with TCAM cell, the designed circuit has lower power-delay product, reducing about 83%. Especially, the TCAM can be only used to search binary data in the circuits, conversely, the proposed ternary CAM unit can be applied to the data lookup of ternary circuit. Hence, this proposed scheme could enrich the three-value memory design field and provide a promising direction for further design of large-capacity addressable memory.