Abstract: This paper studies hardware software partition of parall el systems. A formal hardware software architecture based on algebraic semantic s of PL is established. An optimized partition method is proposed, which is based on the notion of basic scheduling blocks(BSB). The method begins with decomposi ng PL programs into BSB. BSBs are measured in terms of hardware cost, software c ost and communication cost. Optimized partition is finally achieved by a heurist ic algorithm. A set of syntax directed rules are used for partition of the syst em and composition of the hardware software components. Our method integrates s tructural partition with functional one, which is of practical significance.