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    龚道辉, 汪鹏君, 康耀鹏, 张会红. 基于CNFET的高速低功耗三值灵敏放大器设计[J]. 华东理工大学学报(自然科学版), 2017, (2): 248-253. DOI: 10.14135/j.cnki.1006-3080.2017.02.015
    引用本文: 龚道辉, 汪鹏君, 康耀鹏, 张会红. 基于CNFET的高速低功耗三值灵敏放大器设计[J]. 华东理工大学学报(自然科学版), 2017, (2): 248-253. DOI: 10.14135/j.cnki.1006-3080.2017.02.015
    GONG Dao-hui, WANG Peng-jun, KANG Yao-peng, ZHANG Hui-hong. Design of High-Speed and Low-Power Ternary Sense Amplifier Based on CNFET[J]. Journal of East China University of Science and Technology, 2017, (2): 248-253. DOI: 10.14135/j.cnki.1006-3080.2017.02.015
    Citation: GONG Dao-hui, WANG Peng-jun, KANG Yao-peng, ZHANG Hui-hong. Design of High-Speed and Low-Power Ternary Sense Amplifier Based on CNFET[J]. Journal of East China University of Science and Technology, 2017, (2): 248-253. DOI: 10.14135/j.cnki.1006-3080.2017.02.015

    基于CNFET的高速低功耗三值灵敏放大器设计

    Design of High-Speed and Low-Power Ternary Sense Amplifier Based on CNFET

    • 摘要: 通过对碳纳米场效应晶体管(Carbon Nanotube Field Effect Transistor,CNFET)和灵敏放大器原理的研究,提出了一种基于CNFET的高速低功耗三值灵敏放大器设计方案。该方案首先剖析三值反相器电路结构,采用交叉耦合反相器作为三值锁存器;其次结合输入输出信号分离方法,提高放大差分信号速度;然后利用使能信号控制电路状态,降低三值灵敏放大器功耗。采用32 nm CNFET标准模型库进行HSPICE仿真,结果表明所设计的电路逻辑功能正确;芯片成品率高达96.48%,具有较强的稳定性,且与利用CMOS设计的二值灵敏放大器相比工作速度提高64%,功耗降低83.4%。

       

      Abstract: By researching the structure of Carbon Nanotube Field Effect Transistor (CNFET) and the principle of sense amplifier,a scheme of high-speed and low-power ternary sense amplifier circuit is proposed.In this scheme,the circuit structure of a ternary inverter is analyzed.And then,we use cross-coupled inverters method to implant a ternary latch.To improve the speed of differential signal amplification,the input and output signal separation technique is selected.And also,the working states are controlled by enable signal to reduce the power consumption of ternary sense amplifier circuit.Under Stanford University 32 nm CNFET standard model,HSPICE simulation results show that the designed circuit has correct logic functionality.The chip yield of the circuit is up to 96.48% with strong stability.Comparing with conventional binary CMOS sense amplifier,the proposed circuit increases the speed by 64%,and decreases the power consumption by 83.4%.

       

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